Seminar: Safe Use of Multi-Core and Manycore Processors

  Event description   Programme    


Safe Use of Multi-Core and Manycore Processors

Thursday 24 September, 2020 - London, UK

This seminar will now be held 24th September 2020 in London.

Hotel Radison Blu Edwardian Grafton

The latest government advice on Coronavirus.

This seminar will consider how to use processors with multiple cores in a way that safety can be assured, and such that the resulting system can be certified against industry standards and guidelines.

Critical systems, such as those used in avionics, are moving from single core processor to multiple core (multi-core) processor architectures. This enables a reduction in size, weight and power and the use of common processing platforms, reducing costs and allowing common spares. Software certification policies and guidance are currently evolving as experience is gained with creating certification evidence for multi-core processor architectures.
There are some unique challenges for using multi-core processors in certified platforms and these will be highlighted and discussed, including the investigation of multi-core interference channels.

This seminar will be held in central London at the Radisson Blu Edwardian Grafton, 130 Tottenham Court Rd, Bloomsbury, London W1T 5AY

The talks and speakers are shown on the Programme tab above.

(A multi-core processor is typically made of several independent processor cores on the same chip, connected through an on-chip bus. Manycore processors are specialist multi-core processors designed for a high degree of parallel processing, containing a large number of simpler, independent cores.)

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